Mixed-mode Wireless transceivers

The past several years have successfully brought all-digital techniques to radio frequency (RF) frequency synthesizers and transmitters, as well as digitally-intensive techniques to receivers. In addition, digital assistance is applied to RF circuits to improve performance and power consumption. This course will introduce the concepts of the digital RF approach and walk through the major building blocks that comprise new RF transceiver architectures, emphasis is placed on the:

- Conventional charge-pump PLL and all-digital phase-locked loop (ADPLL) comprising: digitally-controlled oscillator (DCO), time-to-digital converter (TDC), and digital loop filter (HW1);

- All-digital transmitters featuring polar or Cartesian signal processing in digitally-controlled power amplifiers (DPA) with wideband modulation capabilities possibly including Quadrature clock generation (HW2);

- Direct-sampling discrete-time receivers comprising switched-cap circuits that perform various FIR and IIR filter operations (HW3).

Exercises and projects use Matlab/ADS to model and simulate the above three subsystems.

RF design related homework's (40-50% final grade) + written exam (60-50% final grade)

In case of an insufficient final result, repair options may exist in accordance with Article 17A, Times and number of examinations, sub 1, of the Teaching and Examination Regulations.

Disclaimer: information may change depending on unforeseen circumstances or measures (see: TER Art 2, sub 5).