Digital IC Design II

This course will consolidate the knowledge acquired in EE4610 by practicing the design of an advanced complex digital VLSI design, where high-level specifications are translated to transistor sizes, going through several abstraction levels.

At each level, the opportunities and limitations of the physical implementation will be considered for finding better solutions and tradeoffs, by means optimization and the search of new topologies, while keeping complexity to a minimum to achieve the desired functionality.

Parasitics and the other effects deriving from the analog behavior of digital circuits will be taken into account using four-corner analysis, as well as simplifications and modeling at each abstraction level and other semi-automatic tools.

The course will be graded based on the target design. The following criteria will be taken into account:

1. Functionality achieved;

2. High-level specifications met;

3. Four-corner analysis completed;

Bonus points will be given to those students that will exceed the specifications and create a robust, reproducible design.

In case of an insufficient final result, repair options may exist in accordance with Article 17A, Times and number of examinations, sub 1, of the Teaching and Examination Regulations.

Disclaimer: information may change depending on unforeseen circumstances or measures (see: TER Art 29, sub 4)