Digital Systems B

The course covers several topics related to digital circuits and systems, including combinatorial and sequential modules, the structure of a processor, and serial communication protocols. The course also covers how to design digital applications in hardware or software, as well as the hardware-software co-design space. The course concludes with a discussion of how to optimize behavioral specifications to logic circuits at the gate level using software synthesis tools. By the end of the course, students should be able to design digital circuits and applications, and optimize their designs for performance and flexibility depending on application requirements.

Topics are:

• Computer Arithmetic

• Sequential circuit timing: tsu, thold, minimum clockperiod, clockskew,

• SystemVerilog synthesis

• Working principles of FPGA (LUT, FF, BRAM,...)

• Serial communication protocols: I2C, SPI, UART,...

• RTL systems

• Basics of RISC-V instruction set, addressing modes, addressing formats, assembly - language

• Simple RISC-V architecture

• Basics of the C programming language

Written exam, re-exam, course lab assignments.

In addition, there will be a test in week 4 and week 8.

The result of the tests is expressed as R, ranging 0 to 10. The R figure is the average of the results of all the tests, in which a non-made test results into a 0.

If the (re-)exam grade is T, then the final grade of C of the course is calculated as follows:

C = T + R x (10-T) / 100.

This calculation is done with one decimal accuracy, and the final grade will be rounded up to half.

The result of the on-line tests, R, is valid for the exam and the resit, but only in the year the on-line tests have been made.

The final mark is valid only when all course lab assignments have been successfully completed.

In case of insufficient results for the course labs, a repair option may exist in accordance with Article 2 Exameneisen, Clause 4, of the Uitvoeringsregeling 2024-2025.

Disclaimer: information may change depending on unforeseen circumstances or measures (see: TER Art 29, sub 4).