Processor Design Project

This is an integration course designed to enable students to apply their knowledge of computer architecture and computer engineering to enhance the design of a general-purpose processor. The primary objective is to improve the performance of a RISC-V + LLVM-based computing platform, with a focus on both architectural and compiler-related aspects.

At the start of the course, students are provided with two resource packages:

1. A RISC-V System-on-Chip (SoC) implementation in Verilog, a curated set of benchmarks from the GMPbench and MiBench suites, and all supporting files required for simulation and FPGA deployment.

2. An archive containing the LLVM RISC-V cross-compiler toolchain.

To assess and validate their design improvements, each student group is equipped with a Zynq-7000 FPGA board, which serves as the target platform for implementation and benchmarking.